T/ISC 0061—2024
通用处理器芯片硬件漏洞分类分级标准 Standard for Common Central Processing Unit Integrated Circuit Hardware Vulnerability Classification and Rating
标准资料状态Standard Status
基本信息Basic Information
标准编号Standard No.
T/ISC 0061—2024
标准名称Standard Title
通用处理器芯片硬件漏洞分类分级标准Standard for Common Central Processing Unit Integrated Circuit Hardware Vulnerability Classification and Rating
发布日期Publication Date
2024-09-03
实施日期Implementation Date
2024-10-03
标准阶段Stage
标准发布Released
英文名称English Title
Standard for Common Central Processing Unit Integrated Circuit Hardware Vulnerability Classification and Rating
起草人Drafters
张家琦、何跃鹰、汪东升、吕勇强、胡伟、邓辰辰、赵发展、孙中豪、李莹、邱朋飞、何家骥、汪文祥、罗召建、鲁辉、李默涵。
Zhang Jia Qi, He Yue Ying, Wang Dong Sheng, Lv Yong Qiang, Hu Wei, Deng Chen Chen, Zhao Fa Zhan, Sun Zhong Hao, Li Ying, Qiu Peng Fei, He Jia Ji, Wang Wen Xiang, Luo Zhao Jian, Lu Hui, Li Mo Han.
起草单位Drafting Unit
国家计算机网络应急技术处理协调中心、清华大学、西北工业大学、中国科学院微电子研究所、北京邮电大学、天津大学、龙芯中科技术股份有限公司、南京集成电路设计服务产业创新中心有限公司、广州大学。
National Computer Network Emergency Response Technical Team/Coordination Center of China, Tsinghua University, Northwestern Polytechnical University, and participating institutions.
标准范围Scope
本文件给出了通用处理器芯片硬件漏洞（简称“漏洞”）的分类方式、分级指标及分级方法指南。本标准适用于通用处理器芯片产品提供者、设计工具提供者、产品使用者、漏洞收录组织、漏洞应急组织在漏洞信息管理、芯片产品生产、技术研发、系统运营等相关活动中进行的漏洞分类、漏洞危害等级评估等工作。
This document provides guidance on classification methods, grading indicators, and grading methods for hardware vulnerabilities in general-purpose processor chips. It applies to vulnerability classification and hazard-level assessment by processor product providers, design tool providers, product users, vulnerability databases, and emergency response organizations in vulnerability information management, chip production, technology R&D, system operation, and related activities.